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RD1088_rev01.2 FPGA or CPLD reads the SD card IP core, based on the wishbone interface, support VHDL- -Verilog www.pudn.com
 File: RD1088_rev01.2Download   Add to favorates  [Vote: very good!  5  4  3  2  1 Vote: very bad!]
  Directory: VHDL-FPGA-Verilog
  Dev tools: VHDL
  File size: 1371 KB
  Update: 2013-01-31
  Downloads: 5
  Uploader: andyluojie1
 Describe: FPGA or CPLD reads the SD card IP core, based on the wishbone interface, support SDHC2.0, contains instructions for the Verilog language
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