海树 2020-03-07 11:24:33
Description: IIC MASTER in verilog HDL
Plat: LINUX | Size: 6KB | Downloads: 1
万柳之毛 2020-03-06 20:20:20
Description: Timer, can complete the countdown, respectively by the minute of the countdown, you can press the button at any time to stop timing.
Plat: Verilog | Size: 14KB | Downloads: 0
xubopoliang 2020-03-06 16:11:40
Description: Basic FPGA entry program, water lamp, key control, key chattering, switch input acquisition
Plat: Verilog | Size: 19228KB | Downloads: 0
LJHER 2020-03-06 15:44:13
Description: Using VHDL to realize SPI to read the accelerometer value in three-axis direction of adxl357
Plat: VHDL | Size: 2KB | Downloads: 1
LJHER 2020-03-06 15:37:32
Description: Accelerometers adxl357 read the acceleration value of XYZ three-axis direction through SPI
Plat: VHDL | Size: 5KB | Downloads: 0
LJHER 2020-03-06 15:34:55
Description: Using VHDL to realize EEPROM's storable source code is suitable for all EEPROM's
Plat: VHDL | Size: 1KB | Downloads: 0
LJHER 2020-03-06 15:33:05
Description: FIFO source code, depth can be set arbitrarily, including FIFO IP core, etc
Plat: VHDL | Size: 12KB | Downloads: 2
LJHER 2020-03-06 15:25:29
Description: The code is very full of functions, which can realize reading and writing of ferroelectric RAM and EEPROM, FIFO and other functions
Plat: VHDL | Size: 5KB | Downloads: 1
Nick8 2020-03-06 14:05:52
Description: get 88e1111 chip parameters
Plat: WINDOWS | Size: 523KB | Downloads: 1
Nick8 2020-03-06 14:02:32
Description: ug-471 for your references ,thank you
Plat: WINDOWS | Size: 2213KB | Downloads: 0
Nick8 2020-03-06 14:01:32
Description: pg 059 for your references ;
Plat: WINDOWS | Size: 1474KB | Downloads: 1
Nick8 2020-03-06 14:00:26
Description: ds 893 for your references ,thank you
Plat: WINDOWS | Size: 614KB | Downloads: 0
Nick8 2020-03-06 13:59:09
Description: ds 891 for your references ,thank you
Plat: WINDOWS | Size: 426KB | Downloads: 1
Nick8 2020-03-06 13:58:05
Description: ds 890 for your references ,thank you
Plat: WINDOWS | Size: 443KB | Downloads: 0
Nick8 2020-03-06 13:56:29
Description: ug947 for your reference ; thank you
Plat: WINDOWS | Size: 355KB | Downloads: 0
abody7478 2020-03-06 10:53:52
Description: its about translation in certin way
Plat: Pascal | Size: 248KB | Downloads: 0
xiaozhanggao 2020-03-06 09:42:30
Description: I2C receives data from the device and realizes it by Verilog code. This resource is realized by Verilog language. It is developed and designed strictly according to I2C bus sequence, which is very helpful for beginners.
Plat: C/C++ | Size: 11215KB | Downloads: 0
xiaozhanggao 2020-03-06 09:36:45
Description: The I2C slaver slave Verilog code is implemented to realize the I2C slave Verilog code. It is concise and annotated, which is conducive to understanding and implementation.
Plat: C/C++ | Size: 1KB | Downloads: 0
万柳之毛 2020-03-04 22:42:23
Description: Very detailed explanation
Plat: Verilog | Size: 89KB | Downloads: 1
万柳之毛 2020-03-04 21:39:19
Description: very detailed explanation
Plat: Verilog | Size: 87KB | Downloads: 2
chu_gun 2020-03-04 18:14:44
Description: more advanced module for uart
Plat: VHDL | Size: 40KB | Downloads: 0
chu_gun 2020-03-04 18:07:18
Description: one of the most open implementation priers i2c
Plat: VHDL | Size: 5KB | Downloads: 0
逃亡北大荒 2020-03-04 17:45:28
Description: Verilog implementation of SDI encoding and decoding, HD version, and SD standard definition version. There is also an explanation of SDI state machine coding
Plat: Verilog | Size: 777KB | Downloads: 1
zqh12138 2020-03-04 16:40:33
Description: The design of DMA controller based on AHB bus is realized efficiently, which is helpful for SoC system development and learning
Plat: VHDL | Size: 730KB | Downloads: 2
zqh12138 2020-03-04 16:36:43
Description: With the market expansion of smart phones, tablet computers, solid-state drives and other products, the demand for fast large capacity memory is growing. NAND flash, as a kind of non-volatile memory, has the advantages of large capacity, low cost, reliability and so on.
Plat: VHDL | Size: 10KB | Downloads: 0
chu_gun 2020-03-04 16:11:08
Description: Reference design - Frequency Generator for the Spartan-3E Starter Kit
Plat: VHDL | Size: 554KB | Downloads: 0
小马过河Na 2020-03-04 15:55:00
Description: The de2-115 development board and its application method are introduced
Plat: VHDL | Size: 9348KB | Downloads: 1
老候 2020-03-04 11:16:34
Description: USB UART receiving function based on Xilinx FPGA
Plat: Verilog | Size: 220KB | Downloads: 0
老候 2020-03-04 11:13:56
Description: USB UART mode value sending function based on Xilinx FPGA
Plat: Verilog | Size: 302KB | Downloads: 0
Hatem_Zakaria 2020-03-03 20:52:12
Description: This is a LDPC Decoder for DVB-S2
Plat: Verilog | Size: 61KB | Downloads: 1
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