张媛 2019-07-30 23:00:28
Description: FPGA program generates 1 PPS pulse signal, using Verilog language.
Plat: Verilog | Size: 3042KB | Downloads: 1
leodashen 2019-07-30 21:10:50
Description: Verilog Digital System Design Course (2nd Edition) Xia Yuwen
Plat: Verilog | Size: 6970KB | Downloads: 1
leodashen 2019-07-30 20:49:47
Description: Verilog Course Lectures at Carnegie Mellon, University Verilog Course Lectures at Carnegie Mellon University Verilog Course Lectures at Carnegie Mellon University
Plat: Verilog | Size: 265KB | Downloads: 1
W451W 2019-07-30 19:36:57
Description: . Using the official DSP library provided by STM32 for FFT is not flexible in use (because it is the FFT of base 4, so the number of FFT points must be 4 ^ n), but its execution efficiency is really very efficient, as can be seen from the test data of FFT operation efficiency shown in Figure 1. This data comes from STM32 DSP library usage document
Plat: C/C++ | Size: 3801KB | Downloads: 1
阿纲, 2019-07-30 15:47:58
Description: UART sending module and receiving module
Plat: Vivado | Size: 3KB | Downloads: 2
TaylorBieber 2019-07-30 14:11:45
Description: DDS program based on FPGA can output sinusoidal square wave triangular wave sawtooth wave
Plat: Quartus II | Size: 4790KB | Downloads: 3
TaylorBieber 2019-07-30 14:09:27
Description: Perfect realization of frequency division and portability of counter module based on FPGA
Plat: Verilog | Size: 3120KB | Downloads: 1
TaylorBieber 2019-07-30 14:02:30
Description: SPI communication test based on FPGA can test SPI communication with stm32
Plat: Verilog | Size: 3568KB | Downloads: 3
TaylorBieber 2019-07-30 14:00:57
Description: Ad9226 signal sampling can be controlled by ad9226 sampling program based on FPGA
Plat: Verilog | Size: 6396KB | Downloads: 1
TaylorBieber 2019-07-30 13:56:27
Description: Flow lamp program based on fpga, portable
Plat: Verilog | Size: 3085KB | Downloads: 0
梧桐1998 2019-07-29 21:28:04
Description: Four-digit and four-digit multiplication is realized by using FPGA. It has simulation waveform and makes rational use of the resources of the FPGA.
Plat: Verilog | Size: 3119KB | Downloads: 1
放荡不羁h 2019-07-29 21:13:33
Description: Huawei Classic Design Complete Introduction Skills, Interview Experience, Design Skills
Plat: Verilog | Size: 8567KB | Downloads: 3
peaked 2019-07-29 19:26:20
Description: The digital phase-locked loop built under quartus can realize automatic frequency tracking.
Plat: Verilog | Size: 3191KB | Downloads: 2
jiachengliasd 2019-07-29 18:01:47
Description: design of Electronic Piano System Based on Passive Buzzer and Matrix Key
Plat: Verilog | Size: 238KB | Downloads: 1
jiachengliasd 2019-07-29 17:22:38
Description: Design of Intensity Regulation System Based on Rotary Encoder and LED Lamp Set
Plat: Verilog | Size: 144KB | Downloads: 1
jiachengliasd 2019-07-29 17:20:39
Description: Design of Traffic Indicator System Based on Digital Tube Independent Display and Tri-color Lamp
Plat: Verilog | Size: 158KB | Downloads: 1
jiachengliasd 2019-07-29 17:18:33
Description: Design of Signal Generator System Based on PCF8591 Digital-to-Analog Conversion and DDS Technology
Plat: Verilog | Size: 359KB | Downloads: 1
MAMY 2019-07-29 17:10:22
Description: The driving of binomial hybrid stepper motor and the subdivision program of stepper motor are realized.
Plat: VHDL | Size: 2KB | Downloads: 3
william19931126 2019-07-29 11:06:39
Description: Realize simple hardware adder and divider, realize source code
Plat: VHDL | Size: 4KB | Downloads: 1
Ticy 2019-07-29 09:11:49
Description: Traffic light control
Plat: Verilog | Size: 3321KB | Downloads: 1
龙载飞 2019-07-28 11:16:14
Description: Libero SOC project, which realizes receiving single byte data through serial port and sending it back to host computer
Plat: Verilog | Size: 622KB | Downloads: 1
绝情谷栽花 2019-07-27 21:32:06
Description: Traffic Light System
Plat: Proteus | Size: 12384KB | Downloads: 1
董奇奇 2019-07-27 17:26:53
Description: zynq xadc on FPGA arm
Plat: Verilog | Size: 1259KB | Downloads: 1
Ken7 2019-07-25 14:35:12
Description: this files describes how to build i2c block modules in verilog hdl and programming them on an fpga device
Plat: VHDL | Size: 323KB | Downloads: 1
Ken7 2019-07-25 14:34:12
Description: this describes building spi block on verilog hdl and programming them on an fpga device
Plat: Verilog | Size: 254KB | Downloads: 1
Ken7 2019-07-25 14:32:18
Description: uart implementation and documentation, this describes the basic steps in building your own uart module on verilog and programming them on an fpga device
Plat: Verilog | Size: 323KB | Downloads: 1
Ken7 2019-07-25 14:28:28
Description: uart documentation, july 17, 2019. the document describes the basics of verilog programming and how to implement them on an fpga device
Plat: Verilog | Size: 254KB | Downloads: 1
swy?lijiahao 2019-07-24 16:07:59
Description: The adder used to realize FPGA hardware development needs to be realized in Verilog language
Plat: Objective-C | Size: 1KB | Downloads: 1
liyuanlnx 2019-07-24 14:44:09
Description: The key delay module of FPGA
Plat: Quartus II | Size: 363KB | Downloads: 1
liyuanlnx 2019-07-24 14:41:45
Description: Experiment of Phase-Locked Loop Based on FPGA
Plat: Quartus II | Size: 390KB | Downloads: 1
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