liu5566 2020-03-29 23:52:15
Description: Alternate's Gigabyte data manual, share it with you
Plat: C/C++ | Size: 2591KB | Downloads: 0
zui556 2020-03-29 23:47:46
Description: Muddle through time "quest" and irresponsible Notes1, share the first step of the trilogy, hope to like it
Plat: C/C++ | Size: 6009KB | Downloads: 0
zui556 2020-03-29 23:46:45
Description: Cheat on the irresponsible note 3 of timequest. Follow the previous 2 and share it with you
Plat: C/C++ | Size: 3524KB | Downloads: 0
zui556 2020-03-29 23:45:47
Description: Make irresponsible notes of timequest. 2. Personal collection, share with you
Plat: C/C++ | Size: 4875KB | Downloads: 0
ITANGTANGI 2020-03-29 22:36:29
Description: Digital to analog converter code based on cyclonev FPGA and resistance network can realize keying change frequency and store waveform data through ROM IP core.
Plat: Verilog | Size: 11045KB | Downloads: 0
大漠孤烟李 2020-03-29 20:40:43
Description: This is an updated traffic light program that can realize the simulation of traffic lights at intersections
Plat: VHDL | Size: 3238KB | Downloads: 0
大漠孤烟李 2020-03-29 20:36:50
Description: The test is to finish a locked circle coding.It has been generated successfully.
Plat: VHDL | Size: 3760KB | Downloads: 0
大漠孤烟李 2020-03-29 20:30:28
Description: the traffic lights which includes the crossing road .It can be generated succussfully.
Plat: VHDL | Size: 3274KB | Downloads: 0
大红袍 2020-03-29 20:11:42
Description: A simple analog of parallel output controller POC. POC acts as the interface between system bus and printer.
Plat: VHDL | Size: 1KB | Downloads: 0
LWYY 2020-03-29 19:26:06
Description: VHDL to achieve the divider, 12 divider
Plat: VHDL | Size: 133KB | Downloads: 0
LWYY 2020-03-29 19:07:09
Description: VHDL language in the development board to achieve the moving target game, can be on the electricity, shooting, timing, scoring, playing background music
Plat: VHDL | Size: 3284KB | Downloads: 0
KUA_MAX 2020-03-29 18:42:28
Description: Nios II is a classic learning material. I hope I like it
Plat: C/C++ | Size: 5768KB | Downloads: 0
KUA_MAX 2020-03-29 18:40:09
Description: An old course of FPGA:n2cpu_Embedded_Peripherals
Plat: C/C++ | Size: 1735KB | Downloads: 0
KUA_MAX 2020-03-29 18:39:07
Description: Those things of FPGA -- timequest static timing analysis rev1.0
Plat: C/C++ | Size: 1817KB | Downloads: 0
KUA_MAX 2020-03-29 18:38:24
Description: The Avalon bus specification of FPGA, learning the useful information of Nios
Plat: C/C++ | Size: 409KB | Downloads: 0
KUA_MAX 2020-03-29 18:37:09
Description: Action? VIP? Board hardware schematic diagram (Revised Version), useful for learning
Plat: C/C++ | Size: 154KB | Downloads: 0
KUA_MAX 2020-03-29 18:35:13
Description: Verilog programming specification, very standard, classic tutorial
Plat: C/C++ | Size: 7291KB | Downloads: 0
zui135 2020-03-29 18:32:44
Description: Connection of special pins of Altera FPGA in Chinese, hard to find data
Plat: C/C++ | Size: 82KB | Downloads: 0
zui135 2020-03-29 18:01:06
Description: The design software of FPGA, natures software manual, good thing
Plat: C/C++ | Size: 2021KB | Downloads: 0
zui135 2020-03-29 17:59:59
Description: Valuable experience of FPGA and Verilog programming specification of a great man
Plat: C/C++ | Size: 189KB | Downloads: 3
zui135 2020-03-29 17:59:18
Description: Learn the instruction manual of signaltap software, a good tool
Plat: C/C++ | Size: 460KB | Downloads: 0
zui136 2020-03-29 17:46:12
Description: Verilog read and write LCM1602 program, display on the screen Help on the screen
Plat: C/C++ | Size: 552KB | Downloads: 0
zui136 2020-03-29 17:43:36
Description: Verilog reading and writing PS2 keyboard and mouse.... Hope I love it.
Plat: C/C++ | Size: 1048KB | Downloads: 0
zui136 2020-03-29 17:41:57
Description: SD card reading and writing Verilog version, for some people may be useful.....
Plat: C/C++ | Size: 1160KB | Downloads: 1
zui136 2020-03-29 17:40:40
Description: FPGA version of DS18B20 program, very practical......
Plat: Others | Size: 1073KB | Downloads: 0
坤坤55 2020-03-29 16:45:13
Description: SDRAM controller code to realize SDRAM control
Plat: Verilog | Size: 15297KB | Downloads: 0
一流大学渣 2020-03-29 15:26:03
Description: Use Verilog to imitate 8255A operation mode to control LED, only schematic diagram, no V file
Plat: VHDL | Size: 123KB | Downloads: 1
zui135 2020-03-29 14:08:47
Description: Hardware schematic diagram of ep4ce6, including PCB diagram
Plat: C/C++ | Size: 57KB | Downloads: 0
独行的云 2020-03-28 16:37:56
Description: 1. It can correctly display the input signal frequency; 2. The frequency range of measurement is 1Hz ~ 99999hz; 3. The measurement results are displayed in decimal; 4. It can measure signal frequency with small amplitude; 5. It has the function of automatically refreshing the output data (e.g. once in 5S); 6. Self checking module (such as generating 100Hz calibration square wave);
Plat: Multisim | Size: 472KB | Downloads: 0
wind_mark 2020-03-28 15:29:44
Description: Nand_flash code explanation, may not be very detailed, but can achieve basic functions, for your reference
Plat: Quartus II | Size: 4KB | Downloads: 0
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