greathelen 2020-02-17 11:38:07
Description: Multi-function Music Play
Plat: Verilog | Size: 6KB | Downloads: 0
xulan123 2020-02-16 18:06:22
Description: Circuit diagram of 100MHz double trace virtual oscilloscope + arm source code + FPGA source code
Plat: VHDL | Size: 11944KB | Downloads: 5
PeykanAli 2020-02-16 16:31:20
Description: Crack of Modelsim 10.2c
Plat: WINDOWS | Size: 957KB | Downloads: 0
a495025284 2020-02-16 16:28:44
Description: FPGA evaluation board DE2-115 user manul
Plat: VHDL | Size: 9633KB | Downloads: 1
wxw007 2020-02-15 11:52:22
Description: SDRAM control, written in VHDL language, can run to 133MHz.
Plat: VHDL | Size: 10KB | Downloads: 0
rehman.abdul9795 2020-02-14 22:22:11
Description: Its basically a binary counter designed using a verilog hdl on xilinx ise design suite to be implemented on fpga spartan 6 development board by digilent.
Plat: Verilog | Size: 907KB | Downloads: 0
南下阳 2020-02-14 17:19:11
Description: In the peripheral experiment of serial port, use the debugging tool of computer serial port to send 10 numbers of 0 ~ 9 to the development board, and then the development board controls the buzzer to send out different tones according to these 10 different numbers
Plat: Verilog | Size: 3179KB | Downloads: 0
南下阳 2020-02-14 17:13:11
Description: In the infrared peripheral experiment, the infrared remote controller is used to send 10 numbers of 0-9 to the development board, and then the development board controls the buzzer to send out different tones according to these 10 different numbers
Plat: Verilog | Size: 4590KB | Downloads: 0
南下阳 2020-02-14 16:58:08
Description: In the PS / 2 peripheral experiment, we use the PS / 2 keyboard to send 10 numbers of 0-9 to our development board, and then the development board controls the buzzer to send out different tones according to these 10 different numbers.
Plat: Verilog | Size: 3194KB | Downloads: 0
南下阳 2020-02-14 16:51:37
Description: In the experiment of multi terminal song ordering system, we can use the serial peripheral to send 0-9 10 digital control buzzers to send different tones, use the PS / 2 peripheral to send 0-9 10 digital control buzzers to send different tones, and use the infrared peripheral to send 0-9 10 digital control buzzers to send different tones.
Plat: Verilog | Size: 3793KB | Downloads: 0
南下阳 2020-02-14 16:42:40
Description: VGA peripheral experiment, VGA display, VGA will display four colors, red, yellow, blue, green
Plat: Verilog | Size: 3269KB | Downloads: 0
bkt340 2020-02-14 13:25:24
Description: A FSM for lights of a car while taking right or left turn working on zedboard .
Plat: Verilog | Size: 32KB | Downloads: 0
bkt340 2020-02-14 13:22:30
Description: A working counter written in verilog code .
Plat: Verilog | Size: 33KB | Downloads: 0
CrazyICer 2020-02-13 10:17:26
Description: Materials are the introduction materials of UVM, which explain how to use UVM environment, and take the readers to enter the gate of IC Verification to master the method of IC design
Plat: VHDL | Size: 4425KB | Downloads: 0
shelleyxia 2020-02-13 01:26:18
Description: Sata3.0 protocol and FPGA module implementation, with code and documentation.
Plat: Verilog | Size: 10700KB | Downloads: 7
shelleyxia 2020-02-13 01:02:31
Description: Sata3.0 protocol and FPGA module implementation, with code and documentation.
Plat: VHDL | Size: 22666KB | Downloads: 5
Nari__ 2020-02-12 22:07:13
Description: cpu8 bits Use the knowledge learned in digital logic completely and coherently, master the basic use methods of EDA tools, and pave the way for the follow-up course of computer principles.
Plat: VHDL | Size: 923KB | Downloads: 0
tys1998 2020-02-12 21:14:44
Description: Use Verilog to implement a single cycle MIPS instruction set CPU
Plat: Verilog | Size: 192KB | Downloads: 0
echolei 2020-02-12 14:19:45
Description: simulate standard 3G SDI format, support 1080p/720p 25hz,30hz,50hz and 60hz
Plat: Vivado | Size: 1KB | Downloads: 1
echolei 2020-02-12 14:14:00
Description: cdcm6208 cofigure using SPI interface
Plat: Verilog | Size: 1KB | Downloads: 0
gaoshanlioushui 2020-02-12 10:46:43
Description: Xilinx FPGA uses VHDL language to communicate with SD card
Plat: VHDL | Size: 16394KB | Downloads: 0
gaoshanlioushui 2020-02-12 10:44:10
Description: FPGA uses VHDL language for serial communication
Plat: VHDL | Size: 2099KB | Downloads: 0
gaoshanlioushui 2020-02-12 10:37:34
Description: FPGA uses VHDL language to control VGA signal output
Plat: VHDL | Size: 7767KB | Downloads: 0
gaoshanlioushui 2020-02-12 10:20:22
Description: fpga control ddr2 code
Plat: VHDL | Size: 1493KB | Downloads: 0
_陳陳_ 2020-02-11 22:41:41
Description: Read the geomagnetic data through I2C interface of STM32, and use interrupt mode!
Plat: C/C++ | Size: 1KB | Downloads: 2
SHAL7 2020-02-11 22:19:54
Description: vhdl code for my quad oscillator zip
Plat: VHDL | Size: 379KB | Downloads: 0
696WWW 2020-02-11 18:43:41
Description: Complete Kalman filter algorithm, written in Verilog code, helpful for beginners, welcome to download
Plat: Verilog | Size: 6929KB | Downloads: 2
uqiuronguqo 2020-02-11 00:19:07
Description: IEEE754 official document
Plat: C/C++ | Size: 97KB | Downloads: 0
augustwp 2020-02-10 23:50:40
Description: xilinx demo board detail designed
Plat: PDF | Size: 19430KB | Downloads: 1
augustwp 2020-02-10 23:43:54
Description: xilinx demo board designed example
Plat: PDF | Size: 19427KB | Downloads: 2
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