namo 2009-11-17 12:54:42
Description: 256Mb H-die DDR SDRAM Specification
Plat: PDF | Size: 288KB | Downloads: 2
waters 2009-11-10 15:49:11
Description: 4 multi port sdram controller
Plat: VHDL | Size: 349KB | Downloads: 35
武忡波 2009-11-09 09:21:18
Description: 6713DSP of SDRAM to achieve great reference value for
Plat: C/C++ | Size: 137KB | Downloads: 16
liubo1220 2009-11-07 23:25:48
Description: DDRⅡ+SDRAM controller.rar
Plat: PDF | Size: 2592KB | Downloads: 7
陈阳 2009-11-03 10:06:29
Description: This is the xilinx application note xapp858 the Chinese version. This application note describes the interface used to achieve high-performance DDR2 SDRAM controller and data acquisition technology. This data collection technique used in each Virtex ™ -5 I/O has an input serializer/deserializer (ISERDES) and output double data rate (ODDR) function.
Plat: VHDL | Size: 437KB | Downloads: 218
陈阳 2009-11-03 10:01:20
Description: The use of Xilinx FPGA and Memory Interface Generator to simplify memory interface. This white paper discusses the various memory interface controller design challenges facing Warfare and Xilinx solutions, but also explains how to use Xilinx Software tools and hardware-proven reference designs to be for your own With (from low-cost DDR SDRAM applications to such as 667 Mb/s This higher performance DDR2 SDRAM interface) design a complete deposit Storage device interface solution.
Plat: PDF | Size: 1097KB | Downloads: 73
喻琪 2009-10-26 17:17:07
Description: i2cinterface.v a section of my own writing verilog code for the I2C interface in the interface used in chip design. Sent to flow through the film, only for reference. debussy and modelsim co-simulation. txt for debussy and modelsim co-simulation reference RTL Coding and Optimization Guide for use with Design Compiler.pdf Mention the number of lectures (1). Wmv Mention the number of lectures (2). Wmv the two videos, and the document is useful for the digital front-end IC designers to improve the design capability. if you think you go to bottleneck, and want to improve, then it is strongly recommended a good look. ADVANCED ASIC CHIP SYNTHESIS Chinese translation of the information. Ppt that is what I strongly recommend, I believe that everyone learning dc knows its original English document. This ppt is equivalent to its translations.It elaborates the dc and pt in Chinese . DDR SDRAM control the timing analysis based on the model. Pdf
Plat: VHDL | Size: 20498KB | Downloads: 45
hanfei410 2009-10-24 21:31:18
Description: DSP6416 TEST program
Plat: TEXT | Size: 504KB | Downloads: 10
李华 2009-10-23 14:33:14
Description: about sdram of sopc
Plat: Others | Size: 12467KB | Downloads: 20
rong677 2009-10-19 09:24:47
Description: A project engineering, hardware contains XINLINX FPGA, configuration FLASH, serial port, SDRAM, and Ethernet chips DM9000A, data acquisition, Ethernet transmission, circuit verification is completely correct, please rest assured that the use of, SPARTAN 3E' s 320-pin BGA it is not easy layout, you can reference to use. To achieve network communication FPGA also can refer to the circuit, because the product upgrades so publicly.
Plat: VHDL | Size: 894KB | Downloads: 1006
Ravi 2009-10-13 22:59:35
Description: SDRAM VHDL/Verilog simulation model
Plat: VHDL | Size: 7KB | Downloads: 17
wisebear 2009-10-12 22:49:51
Description: sdram design documents and source code
Plat: VHDL | Size: 156KB | Downloads: 7
zxx359654879 2009-10-04 23:00:25
Description: ActelFPGA_Camera_ApplicationNote
Plat: PDF | Size: 261KB | Downloads: 117
蔡锋 2009-10-04 22:02:57
Description: S3C2440 each functional module, the most comprehensive testing program to learn the basis of 2440-driven, includes LCD, SD card, USB, NANDFlash, SDRAM, stepldr, ADC, Camera, and so the most comprehensive driver.
Plat: C/C++ | Size: 7395KB | Downloads: 342
syz1984727 2009-09-20 10:07:02
Description: SDRAM read and write the VHDL program FPGA (already tested)
Plat: VHDL | Size: 5KB | Downloads: 20
syz1984727 2009-09-20 10:03:09
Description: Hynix' s 8M Byte SDR SDRAM Simulation of the Verilog language
Plat: VHDL | Size: 53KB | Downloads: 37
tony 2009-09-17 15:31:35
Description: SDRAM与DDR布线指南 SDRAM与DDR布线指南
Plat: WORD | Size: 5KB | Downloads: 15
zidingl 2009-09-07 20:24:52
Description: xilinx of ddr sdram controller documentation
Plat: VHDL | Size: 663KB | Downloads: 25
zhangsan 2009-09-05 11:21:24
Description: FPGA memory control processes, including ram, fifo, sdram, flash and so on.
Plat: VHDL | Size: 324KB | Downloads: 151
lilei 2009-09-01 21:25:49
Description: As the CameraLink interface is currently based on a variety of cameras can not directly display, this article based on Xilinx' s Spartan 3 series FPGAXC3S1000-6FG456I designed a set of real-time display system, the system can be achieved without machine case through the system to complete the CameraLink cameras signal reception, cache, read and display systems use two SDRAM frame buffer as the input signals into the CameraLink frame rate of 75Hz, a resolution of 1 024 × 768 for XGA format signal, and using ADV7123JST chip digital-analog conversion, the chip output signal to the VGA port, through the VGA display monitor
Plat: VHDL | Size: 13KB | Downloads: 235
ruiyuqiankun 2009-09-01 09:34:19
Description: This code is to control the SDRAM of the VHDL code, optimization has been several times closer to perfection, which is mainly used to achieve a state machine is encapsulated entity, easy to call the module
Plat: VHDL | Size: 9KB | Downloads: 20
vasil 2009-08-22 19:47:51
Description: Simple SDRAM Controller.
Plat: VHDL | Size: 3KB | Downloads: 12
王颖伟 2009-08-21 11:26:22
Description: ddr2_sdram_controller
Plat: VHDL | Size: 5542KB | Downloads: 11
wang 2009-08-17 18:17:35
Description: sdram use verilog HDL used to achieve operation of the sdram! On the timing and language skills required!
Plat: VHDL | Size: 68KB | Downloads: 13
沙钻王 2009-08-15 11:09:58
Description: SDROM software for s3c2410
Plat: C/C++ | Size: 3KB | Downloads: 10
caj899 2009-08-14 22:54:02
Description: Rockchip EFX400SL technology development board created by the use of ISE projects SDRAM controller source
Plat: VHDL | Size: 13131KB | Downloads: 31
安路小华 2009-08-04 12:36:26
Description: SDRAM complete story of the principles, characteristics and methods of operation parameters, is the best memory you understand the information
Plat: Others | Size: 4154KB | Downloads: 41
qiuyigui 2009-07-31 14:10:22
Description: sdram timing of the principle and detailed analysis, let you quickly understand the principles of sdram
Plat: C/C++ | Size: 1001KB | Downloads: 13
lilei 2009-07-16 15:29:04
Description: read&write program of sdram
Plat: C/C++ | Size: 6KB | Downloads: 82
yangzi1819 2009-07-12 22:42:07
Description: FPGA-based PCI data acquisition procedures, including SDRAM control, PCI9054 timing control, the development of language verilog, development environment quartusII
Plat: Others | Size: 2733KB | Downloads: 484