smaluo

Score: 40
Uploads: 1
Downloads: 4
Create time: 2020-03-24 10:49:26

Upload log:
crc-gen.tar.gz - CRC verilog/VHDL code自动产生工具,数据位宽和多项式可配置1~1024bits

Download log:
risc-4-way-lru-processor-verilog.zip - A RISC processor written in verilog codes.
Proj_Cache.zip - 高速缓存的Verilog HDL实现。(包括直接相联和组相联)
W25Q80NE verilog Model.zip - SPI FLASH官方仿真模型方便modelsim testbench调试仿真
GD25LQ40_verilog.rar - SPI接口的flash仿真模型,用于soc仿真,本人使用过了,很好用的

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