wuming603

Score: 40
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Create time: 2016-03-02 09:49:29

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UART2.0.zip - 串口发送接收模块,波特率可设置,基于XILINX Spantan6 FPGA,自带数据产生模块,可产生一个16bit的一次递加的数据,每10ms发送一次数据

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