Description: Compiling module mult11sx8s Compiling module dwt_1 Compiling module top_dwt Compiling module glbl Time Resolution for simulation is 1ps. Waiting for 1 sub-compilation(s) to finish...

Description: Time Resolution for simulation is 1ps. Waiting for 1 sub-compilation(s) to finish... Compiled 4 Verilog Units Built simulation executable G:/Techscope/On going Mtech/Miniproject/1DDWT/xilinx/top_dwt_isim_beh.exe Fuse Memory Usage: 101756 KB Fuse CPU Usage: 1435 ms

Description: This is the code of two-roll balanced car.

Description: The use of CORDIC rotation factor method to achieve the various functions of FPGA, here as long as the realization of sine and cosine function

Description: Implementing finite length digital filtering

Description: Intelligent electronic clock (1) timing: seconds, minutes, hours, days, weeks, months, years. (2) automatic discrimination of leap year.

Description: Used to drive an ink screen of 2.13 inches, an electric paper screen. Contains Arduino, STM32 platform source code.

Description: This design is based on 8951 of a calendar program, you can directly use it, for beginners to try.

Description: Control motor rock positive reversal, delay to prevent the motor burned.

Description: DDS signal module, AD9850 module data

Description: RC5 project Schematic and Source code

Description: Based on the intelligent building design scheme, a full set of design drawings

Description: Atmel MCU ISP Software & Document

Description: Switching power supply resonant LLC closed loop full bridge simulation circuit, classic

Description: Read the displacement rate collected by the mouse sensor

Description: Double closed-loop circuit simulation, verified output, stable effect,

Description: Hardware circuit design of USB3.0 interface based on FPGA and CYUSB3014

Description: Digital tube scrolling shows a single number

Description: This is a 51 read and write card program that I bought information from the Internet for your reference only

Description: Boost circuit topology

Description: The schematic diagram is used for various SCR triggering circuits, and the pulse transformer is adopted to trigger more quickly and steadily.

Description: This code is to achieve the LDPC code by the C language, use IRA LDPC encoding algorithm , decode is LLR BP algorithm, first of all, the code is to achieve the encoding process of LDPC code, and then one step by step to achieve the decoding process through the LLR BP algorithm. The main process of decoding: initialization process, check node update process, bit node update process, finally decoding judgment, if meet the requirements or the maximum number of iterative decoding is out, or return to the check node update continued execution cycle.

Description: Clock Thermometer realized by single chip microcomputer

Description: FPGA learning materials

Description: AD9268 chip for the realization of the function, manual

Description: Altium altium designeraltium designer

Description: A system uses only Hard wire and Assembly, organizes with all Chinese electronic products and their drivers: Chip: STC12C5A60S2 USB-TTL: PL2303 Display: KD014QQTBN001 Flash: W25Q128FV. The readers can refer to BBS for detail: http://bbs.csdn.net/topics/392176853

Description: Pspice Emitter Follow

Description: SCM control fan speed, blowing disk, and stable at the specified height

Description: U81EA u884C u8F06 u653.0 u6E2F u6D4B u901F u4EEA u7684 u786C u4EF6 u539F u7406 u56FE uFF0C u5305 u542B u84DD u7259 uFF0C u5C04 u9891 uFF0C u6E29 u5EA6 UFF0C u65F6 u949F uFF0C u970D u5C14 uFF0C u6DB2 u6676 u7B49 u6A21 u5757