bob_dod 2018-08-14 19:56:11
Description: Five level pipelined MIPS reduced instruction set CPU exercise program
Plat: Verilog | Size: 38KB | Downloads: 0
erhe 2018-08-14 17:14:22
Description: AES encryption function based on embedded platform
Plat: C-C++ | Size: 2KB | Downloads: 0
momotova 2018-08-14 14:53:25
Description: Verilog model 24////////
Plat: WINDOWS | Size: 13KB | Downloads: 0
329275455 2018-08-14 13:59:04
Description: FPGA analog I2C read and write 24C02, verilog source code
Plat: Verilog | Size: 67KB | Downloads: 0
329275455 2018-08-14 13:55:02
Description: FPGA I2C driver verilog source code
Plat: Verilog | Size: 342KB | Downloads: 0
janhui 2018-08-14 13:18:47
Description: FFT 8 point implementation, the implementation of the base 2 algorithm, FPGA verification function.
Plat: VHDL | Size: 479KB | Downloads: 0
janhui 2018-08-14 13:12:05
Description: FFT 8 point implementation, the implementation of the base 2 algorithm, FPGA verification function.
Plat: VHDL | Size: 44KB | Downloads: 0
haweiliya 2018-08-14 13:10:05
Description: Based on Avalon bus, pulse frequency, duty cycle and pulse number can be configured by Avalon bus. This module is mainly used to verify the correctness of another pulse counting module avalon_slave_pluscounter uploaded by me, and can also be used to generate accurate pulse number and pulse number. The frequency of impulse.
Plat: Verilog | Size: 2KB | Downloads: 0
xyf0 2018-08-13 21:00:07
Description: General SDRAM controller module, can be used directly project, annotated in detail, can be used as learning materials.
Plat: Verilog | Size: 1502KB | Downloads: 0
CrazyICer 2018-08-13 18:04:26
Description: SATA IP kernel HDL language implementation, suitable for novice learning, and engineering use.
Plat: VHDL | Size: 369KB | Downloads: 1
ztbll 2018-08-13 16:58:54
Description: TLC5620 driver and doc
Plat: Verilog | Size: 1249KB | Downloads: 0
昵称110 2018-08-13 13:25:30
Description: iscas89 benchmark, written in verilog language, can be used to generate test pattern
Plat: VHDL | Size: 1010KB | Downloads: 1
xxxmcu 2018-08-13 13:23:28
Description: CRC16 computing method, Verilog implementation, Xilinx platform
Plat: Verilog | Size: 6KB | Downloads: 0
阿华 2018-08-13 09:56:34
Description: This program is used to realize the HDMI display function of ZYNQ-7000.
Plat: Verilog | Size: 17914KB | Downloads: 0
fadai 2018-08-13 07:43:18
Description: QC LDPC Coding and Decoding Code and Paper Matching are Excellent Style of Running Code for Graduate Students
Plat: C-C++ | Size: 19279KB | Downloads: 0
daidong 2018-08-12 16:52:36
Description: A variety of FPGA routines, including LED, UART serial port, VGA, ad, nixie tube
Plat: VHDL | Size: 6232KB | Downloads: 1
jfjfjfjfjfjf 2018-08-12 15:03:34
Description: XILINX high-speed loader emulator driver software download file
Plat: C-C++ | Size: 34117KB | Downloads: 0
小陈怕毛猴子 2018-08-11 23:46:02
Description: Verilog implementation of CORDIC algorithm
Plat: Quartus II | Size: 1KB | Downloads: 0
威风的趣味 2018-08-11 11:42:16
Description: MISP instruction Verilog HDL Single-Circle-CPU
Plat: Vivado | Size: 11KB | Downloads: 0
vicky_810 2018-08-10 15:38:37
Description: FPGA remote system upgrade design file
Plat: Verilog | Size: 1477KB | Downloads: 0
limonking 2018-08-09 23:58:49
Description: The integrated 8051 IP, oc8051 occupies 2519 LEs. Oc8051 (opencores) 30.52MHz
Plat: Verilog | Size: 6844KB | Downloads: 0
小李大大 2018-08-09 18:55:19
Description: Using a queue to receive data from the serial port
Plat: C-C++ | Size: 2KB | Downloads: 0
ERISED 2018-08-09 18:44:46
Description: One bit adder, edited in Quartus II
Plat: VHDL | Size: 2KB | Downloads: 0
zhubaojun 2018-08-09 18:06:52
Description: fpga and dsp communation with srio
Plat: Verilog | Size: 30460KB | Downloads: 1
guibr321 2018-08-09 17:43:54
Description: Example of game pong.
Plat: VHDL | Size: 10763KB | Downloads: 0
浪迹天涯3 2018-08-09 16:39:58
Description: USB chip CY7C68013 and FPGA interface test procedures, Verilog language, CY7C68013 firmware content, debugging through.
Plat: Verilog | Size: 1573KB | Downloads: 0
岁月传奇 2018-08-09 14:04:51
Description: The realization of serial port and transceiver function. Use serial debugging assistant, send data to FPGA development board, development board and send the received data to the serial debugging assistant.
Plat: Verilog | Size: 6841KB | Downloads: 0
jakob 2018-08-08 16:56:15
Description: Using the PCIE interface of FPGA development board to realize data transmission and transmission.
Plat: VHDL | Size: 12500KB | Downloads: 0
jet_3211 2018-08-08 11:50:21
Description: FM radio transmitter from the board Mars rover2
Plat: Quartus II | Size: 1941KB | Downloads: 0
jet_3211 2018-08-08 11:46:45
Description: Text VGA module on VHDL
Plat: Quartus II | Size: 205KB | Downloads: 0
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