Miguel Dumani 2017-08-16 12:50:23
Description: vga driver code in languaje vhdl
Plat: VHDL | Size: 142KB | Downloads: 0
john smith 2017-08-16 04:46:28
Description: verilog model for 24xx04
Plat: WINDOWS | Size: 7KB | Downloads: 0
Bhagavan krishna 2017-08-15 21:05:37
Description: AMBA_APB verilog code
Plat: Verilog | Size: 1KB | Downloads: 0
赵子崴 2017-08-15 16:21:50
Description: The file provides hash function data and code examples for your reference.
Plat: Verilog | Size: 13094KB | Downloads: 0
陈卓 2017-08-13 23:02:25
Description: unverisal asyn fifo
Plat: VHDL | Size: 2KB | Downloads: 0
小余 2017-08-13 20:08:39
Description: the code for DDR2.It is used for reading the data of DDR2
Plat: VHDL | Size: 3KB | Downloads: 0
svenyuan 2017-08-13 19:34:42
Description: FPGA read spi flash n25q128 Read Identification
Plat: VHDL | Size: 1966KB | Downloads: 0
han xiaodong 2017-08-13 17:37:12
Description: an counter example written by verilog.
Plat: Verilog | Size: 26KB | Downloads: 0
余凡 2017-08-11 16:51:43
Description: 24 hours digital clock, can adjust time, can pause.
Plat: Verilog | Size: 3711KB | Downloads: 0
kgpian 2017-08-10 17:38:25
Description: lab assignmenbt in verilog
Plat: Verilog | Size: 504KB | Downloads: 0
kgpian 2017-08-10 17:37:34
Description: lab assignment in verilog
Plat: Verilog | Size: 1484KB | Downloads: 0
kgpian 2017-08-10 17:33:18
Description: assignment in verilog 3
Plat: Verilog | Size: 780KB | Downloads: 0
kgpian 2017-08-10 17:32:25
Description: lab assignment 2 in verilog
Plat: Verilog | Size: 540KB | Downloads: 0
kgpian 2017-08-10 17:30:54
Description: lab assinment in verilog
Plat: Verilog | Size: 390KB | Downloads: 0
kgpian 2017-08-10 17:25:44
Description: lab assinment on verilog code
Plat: Verilog | Size: 1946KB | Downloads: 0
刘青 2017-08-10 14:16:05
Description: Linear feedback shift registers are usually used to perform signature analysis based on cyclic redundancy check in data compression circuits, and are applied to applications requiring pseudorandom binary numbers. the program design based on vivado
Plat: Verilog | Size: 101KB | Downloads: 0
孟月如 2017-08-10 09:33:30
Description: Verilog Frequence Measure
Plat: Verilog | Size: 444KB | Downloads: 0
gss 2017-08-09 18:52:15
Description: basic circuit design based on verilog
Plat: Verilog | Size: 354KB | Downloads: 0
2017-08-09 12:38:03
Description: Digital FM Transmitter Based on FPGA Verilog Language
Plat: Verilog | Size: 7719KB | Downloads: 1
杨婷 2017-08-09 11:41:14
Description: Using Verilog to achieve RTLAB multi-channel driver
Plat: Verilog | Size: 1656KB | Downloads: 0
qjy 2017-08-09 09:34:47
Description: 2 second gate time frequency meter
Plat: Verilog | Size: 5508KB | Downloads: 0
abc 2017-08-08 14:12:01
Description: Verilog realize the counter and send six digital tube real-time display
Plat: Verilog | Size: 4310KB | Downloads: 0
张帅 2017-08-08 00:07:40
Description: Verilog beginners commonly used modules, can be used as beginners experimental use
Plat: Verilog | Size: 103KB | Downloads: 2
chen 2017-08-07 15:45:37
Description: verilog
Plat: Verilog | Size: 17KB | Downloads: 0
nuageux 2017-08-07 14:27:05
Description: verilog langurage to generate random numbers
Plat: Others | Size: 2965KB | Downloads: 0
陈玮 2017-08-07 10:00:12
Description: This is a four bit sequence detector, including three modes that can be selected: increment mode (detecting four consistency increment data), decrement mode (detecting four consistency decrement data) and steadiness mode (detecting four consistency same data). The whole design adopts synchronous clock, asynchronous reset, and uses Mealy state machine. The whole file concludes the simulation environment and testbench.
Plat: Verilog | Size: 1812KB | Downloads: 0
杜合平 2017-08-06 22:24:28
Description: Verilog based I2C interface protocol code, support EEPROM
Plat: Verilog | Size: 1444KB | Downloads: 2
lms 2017-08-06 03:19:02
Description: Design of DDS based on FPGA
Plat: Verilog | Size: 50KB | Downloads: 1
chen jacker 2017-08-04 11:14:11
Description: it is based on DDR3 IP core of xilinx
Plat: Verilog | Size: 1KB | Downloads: 1