姚粤 2017-12-16 18:28:15
Description: VHDL implementation of spi-slave communication
Plat: VHDL | Size: 743KB | Downloads: 0
覃媛 2017-12-16 01:51:06
Description: cankoajiazhibuda shenzhong
Plat: LINUX | Size: 4KB | Downloads: 0
覃媛 2017-12-16 01:45:53
Description: VHDL shumaguan fenpinqi
Plat: LINUX | Size: 1KB | Downloads: 0
覃媛 2017-12-16 01:41:18
Description: limianbaohanyigeVHDLxiede
Plat: DOS | Size: 1KB | Downloads: 0
覃媛 2017-12-16 01:35:22
Description: VHDL zhuangtaijishixian
Plat: VHDL | Size: 1KB | Downloads: 0
许成 2017-12-14 09:52:24
Description: VHDL implementation of SPI, from the machine implementation method, the realization of 32 bit transmission, one-way transmission.
Plat: VHDL | Size: 1KB | Downloads: 0
Nicolas 2017-12-13 17:18:34
Description: communication rs232 in vhdl with clock divider, counter, buffer, rs232tx, rs232rx.
Plat: VHDL | Size: 14KB | Downloads: 0
欧淦 2017-12-13 17:11:17
Description: b to bcd code very easy and readily to understand
Plat: WINDOWS | Size: 644KB | Downloads: 0
王淞 2017-12-13 15:07:15
Description: Design a 9 person voting device in the Verilog HDL language,
Plat: VBA | Size: 3KB | Downloads: 0
Gungor Derman 2017-12-12 16:47:26
Description: 16 bit Ripple Carry Adder using vhdl on modelsim
Plat: C# | Size: 65KB | Downloads: 0
孟涛 2017-12-08 11:41:20
Description: 8 operations of ALU4 are realized
Plat: WINDOWS | Size: 470KB | Downloads: 0
巩奕 2017-12-08 08:09:39
Description: To realize taxi billing function, it can show mileage and cost
Plat: VHDL | Size: 13483KB | Downloads: 1
Daniel 2017-12-07 22:54:26
Description: 12 words dont come easy
Plat: C-C++ | Size: 162KB | Downloads: 0
lmh 2017-12-04 16:13:47
Description: The realization of the FPGA development version of the corresponding button control digital tube scanning
Plat: Quartus II | Size: 335KB | Downloads: 0
王方 2017-12-04 10:54:51
Description: Sequence detector code
Plat: VHDL | Size: 141KB | Downloads: 0
小雨 2017-12-03 21:12:17
Description: DDDWADSDDSADSADASDSADASDASDSADASDSDAD
Plat: WINDOWS | Size: 855KB | Downloads: 0
ozgur 2017-11-30 14:48:59
Description: Disparity mapp code in VHDL
Plat: VHDL | Size: 17KB | Downloads: 0
黃志焜 2017-11-30 00:42:44
Description: stepper motor drive. use VHDL
Plat: VHDL | Size: 19KB | Downloads: 0
张雪阳 2017-11-29 14:18:39
Description: 20Mhz frequency divider
Plat: VHDL | Size: 187KB | Downloads: 0
Hammadyounas2008 2017-11-27 13:45:17
Description: vhdl is very good for doing project
Plat: VHDL | Size: 4059KB | Downloads: 0
李云海 2017-11-26 16:09:38
Description: LED breathing lamp, can change the number of LED lights, respiratory rate, and other parameters.
Plat: VHDL | Size: 159KB | Downloads: 1
赵英旭 2017-11-25 03:24:33
Description: testbook for vhdl coding
Plat: VHDL | Size: 243KB | Downloads: 0
xxx 2017-11-25 00:53:23
Description: 8188 chipset driver Demo
Plat: LINUX | Size: 394KB | Downloads: 0
启明星 2017-11-23 16:46:22
Description: 5110 picture display program based on basys2 development board
Plat: VHDL | Size: 403KB | Downloads: 1
DanCerv 2017-11-23 06:33:34
Description: Half- adder 1- bit design implemented in ISE XIlinx Design Suite. Module in VHDL language
Plat: VHDL | Size: 21KB | Downloads: 0
DanCerv 2017-11-23 06:27:38
Description: This is an example to implement an Half-adder for xilinx FPGA
Plat: VHDL | Size: 21KB | Downloads: 0
medamine 2017-11-22 17:34:20
Description: ip-cores-video_controller_jpeg_encoder
Plat: VHDL | Size: 2164KB | Downloads: 1
medamine 2017-11-22 17:16:54
Description: read and write text to vhdl language
Plat: VHDL | Size: 2KB | Downloads: 0