ddr_usb

Directory: VHDL-FPGA-Verilog
Plat: VHDL
Size: 3386KB
Downloads: 8
Upload time: 2009-07-29 22:23:21
Uploader: laojiang
Description:   The 256-bit data width conversion FIFO through the two 16-bit using the XILINX s ISE10.1 to complete the design documents for the works in this simulation results

File list:
ddr_usb
.......\.lso
.......\coregen.cgp
.......\coregen.log
.......\coregen.rsp
.......\ctrl_fifo.bld
.......\ctrl_fifo.cmd_log
.......\ctrl_fifo.lso
.......\ctrl_fifo.ncd
.......\ctrl_fifo.ngc
.......\ctrl_fifo.ngd
.......\ctrl_fifo.ngr
.......\ctrl_fifo.pad
.......\ctrl_fifo.par
.......\ctrl_fifo.pcf
.......\ctrl_fifo.prj
.......\ctrl_fifo.ptwx
.......\ctrl_fifo.stx
.......\ctrl_fifo.syr
.......\ctrl_fifo.twr
.......\ctrl_fifo.twx
.......\ctrl_fifo.unroutes
.......\ctrl_fifo.v
.......\ctrl_fifo.xpi
.......\ctrl_fifo.xst
.......\ctrl_fifo_guide.ncd
.......\ctrl_fifo_map.map
.......\ctrl_fifo_map.mrp
.......\ctrl_fifo_map.ncd
.......\ctrl_fifo_map.ngm
.......\ctrl_fifo_map.xrpt
.......\ctrl_fifo_ngdbuild.xrpt
.......\ctrl_fifo_pad.csv
.......\ctrl_fifo_pad.txt
.......\ctrl_fifo_par.xrpt
.......\ctrl_fifo_prev_built.ngd
.......\ctrl_fifo_summary.html
.......\ctrl_fifo_summary.xml
.......\ctrl_fifo_usage.xml
.......\ctrl_fifo_xst.xrpt
.......\ddr_usb.ise
.......\ddr_usb.ntrc_log
.......\ddr_usb.restore
.......\ddr_usb_xdb
.......\...........\cst.xbcd
.......\...........\tmp
.......\...........\...\ise
.......\...........\...\...\version
.......\...........\...\...\__OBJSTORE__
.......\...........\...\...\............\Autonym
.......\...........\...\...\............\common
.......\...........\...\...\............\HierarchicalDesign
.......\...........\...\...\............\..................\HDProject
.......\...........\...\...\............\..................\.........\HDProject
.......\...........\...\...\............\..................\.........\HDProject_StrTbl
.......\...........\...\...\............\..................\__stored_object_table__
.......\...........\...\...\............\PnAutoRun
.......\...........\...\...\............\.........\Scripts
.......\...........\...\...\............\.........\.......\RunOnce_tcl
.......\...........\...\...\............\.........\.......\RunOnce_tcl_StrTbl
.......\...........\...\...\............\ProjectNavigator
.......\...........\...\...\............\................\dpm_project_main
.......\...........\...\...\............\................\................\dpm_project_main
.......\...........\...\...\............\................\................\dpm_project_main_StrTbl
.......\...........\...\...\............\................\................\NameMap
.......\...........\...\...\............\................\................\NameMap_StrTbl
.......\...........\...\...\............\................\__stored_objects__
.......\...........\...\...\............\................\__stored_objects___StrTbl
.......\...........\...\...\............\................\__stored_object_table__
.......\...........\...\...\............\ProjectNavigatorGui
.......\...........\...\...\............\...................\GuiProjectData
.......\...........\...\...\............\...................\GuiProjectData_StrTbl
.......\...........\...\...\............\SrcCtrl
.......\...........\...\...\............\.......\SavedOptions
.......\...........\...\...\............\STE
.......\...........\...\...\............\xreport
.......\...........\...\...\............\.......\Gc_RvReportViewer-Current-Module
.......\...........\...\...\............\.......\Gc_RvReportViewer-Current-Module_StrTbl
.......\...........\...\...\............\.......\Gc_RvReportViewer-Module-Data-ctrl_fifo
.......\...........\...\...\............\.......\Gc_RvReportViewer-Module-Data-ctrl_fifo_StrTbl
.......\...........\...\...\............\.......\Gc_RvReportViewer-Module-DataFactory-Default
.......\...........\...\...\............\.......\Gc_RvReportViewer-Module-DataFactory-Default_StrTbl
.......\...........\...\...\............\_ProjRepoInternal_
.......\...........\...\...\__REGISTRY__
.......\...........\...\...\............\Autonym
.......\...........\...\...\............\.......\regkeys
.......\...........\...\...\............\bitgen
.......\...........\...\...\............\......\regkeys
.......\...........\...\...\............\common
.......\...........\...\...\............\......\regkeys
.......\...........\...\...\............\cpldfit
.......\...........\...\...\............\.......\regkeys
.......\...........\...\...\............\Cs
.......\...........\...\...\............\..\regkeys
.......\...........\...\...\............\dumpngdio
.......\...........\...\...\............\.........\regkeys
.......\...........\...\...\............\fuse
.......\...........\...\...\............\....\regkeys
.......\...........\...\...\............\HierarchicalDesign
.......\...........\...\...\............\..................\HDProject

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