Directory: Communication develop
Plat: VHDL
Size: 2KB
Downloads: 64
Upload time: 2008-07-09 10:09:56
Uploader: M
Description:   Original code, the use of VHDL to achieve the 64 point mean filter. Experiment tested the results were very good. Can be easily modified into arbitrary point mean filter. Use of multi-point sliding computation, reduces the output delay, a maximum of three clock delay. AD sampling can be used to deal with post-filtering.

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