sc2_1.1beta.tar

Directory: VHDL-FPGA-Verilog
Plat: VHDL
Size: 3140KB
Downloads: 757
Upload time: 2008-04-27 16:48:11
Uploader: dingzex
Description:   c to DHL conversion tools for C language made use of the algorithm in FPGA to do to speed up processing.

File list:
sc2_1.1beta
...........\.streamscrc
...........\apps
...........\....\arch
...........\....\....\Basic.def
...........\....\....\Firebird.def
...........\....\....\Firebird_mem.def
...........\....\....\Memory_types.def
...........\....\Makefile
...........\....\mem1
...........\....\....\gen_data.c
...........\....\....\Makefile
...........\....\....\mem1.sc
...........\....\....\README
...........\....\mem2
...........\....\....\gen_data.c
...........\....\....\Makefile
...........\....\....\mem2.sc
...........\....\....\mti_vcom.do
...........\....\....\README
...........\....\....\system_cfg.vhd
...........\....\strm1
...........\....\.....\Makefile
...........\....\.....\mti_vcom.do
...........\....\.....\README
...........\....\.....\strm1.fig
...........\....\.....\strm1.sc
...........\....\.....\system_cfg.vhd
...........\....\strm2
...........\....\.....\Makefile
...........\....\.....\mti_vcom.do
...........\....\.....\README
...........\....\.....\strm2.sc
...........\....\.....\system_cfg.vhd
...........\doc
...........\...\bugs
...........\...\....\bugdb.txt
...........\...\hw_lib
...........\...\......\bram.eps
...........\...\......\bram.fig
...........\...\......\dpram.eps
...........\...\......\dpram.fig
...........\...\......\hwlib.aux
...........\...\......\hwlib.dvi
...........\...\......\hwlib.lof
...........\...\......\hwlib.log
...........\...\......\hwlib.pdf
...........\...\......\hwlib.ps
...........\...\......\hwlib.tex
...........\...\......\hwlib.toc
...........\...\......\latex8.bst
...........\...\......\latex8.sty
...........\...\......\latex8.tex
...........\...\......\Makefile
...........\...\......\memory.eps
...........\...\......\memory.fig
...........\...\......\process_component.eps
...........\...\......\process_component.fig
...........\...\......\sc_components.tex
...........\...\......\sc_mem.tex
...........\...\......\sc_strm2.tex
...........\...\......\sc_syn.tex
...........\...\......\streams_component.eps
...........\...\......\streams_component.fig
...........\...\......\strm2.eps
...........\...\......\strm2.fig
...........\...\impl_notes
...........\...\..........\arch_0417.txt
...........\...\..........\Basic_0417.def
...........\...\..........\memory.txt
...........\...\..........\mem_extended.txt
...........\...\..........\microinstructions.txt
...........\...\..........\notes.txt
...........\...\..........\Spec.html
...........\...\manual
...........\...\......\ex1.eps
...........\...\......\ex1.fig
gui_pic.jpg
...........\...\......\latex8.bst
...........\...\......\latex8.sty
...........\...\......\latex8.tex
...........\...\......\Makefile
...........\...\......\sc2.aux
...........\...\......\sc2.bbl
...........\...\......\sc2.bib
...........\...\......\sc2.blg
...........\...\......\sc2.dvi
...........\...\......\sc2.log
...........\...\......\sc2.pdf
...........\...\......\sc2.ps
...........\...\......\sc2.tex
...........\...\......\sc_data_types.tex
...........\...\......\sc_decls.tex
...........\...\......\sc_examples.tex
...........\...\......\sc_intrinsic_functions.tex
...........\...\......\sc_org.tex
...........\...\......\sc_synth.tex
...........\...\......\streams-c-org.eps
...........\...\......\streams-c-org.fig
...........\...\sim_rt

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