硬件架构的艺术 数字电路的设计方法与技术
vhdl 

Directory: VHDL-FPGA-Verilog
Plat: Verilog
Size: 29794KB
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Upload time: 2020-09-16 06:38:46
Uploader: panshi221
Description:   This book reveals the design art of hardware architecture, covering the author's experience and research results in chip design industry for more than ten years. This book is divided into nine chapters. Chapter 1 introduces the concept of metastable state, quantization methods and techniques to reduce its influence; Chapter 2 introduces clock technology of synchronous design, and puts forward feasible clock scheme and system reset strategy. Chapter 3 introduces the problems and solutions when using asynchronous clock or "processing multiple clocks" in design. Chapter 4 introduces all aspects and implementation methods of clock divider. Chapter 5 describes low power design techniques to reduce dynamic and static power consumption.

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硬件架构的艺术 数字电路的设计方法与技术.pdf, 39558769 , 2020-08-27

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