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Directory: Modem program
Plat: VHDL
Size: 11866KB
Downloads: 0
Upload time: 2020-04-13 14:26:57
Uploader: EA1
Description:   The attachment is the code of FPGA verification platform, which uses the framework of UVM to build and share 111111111

File list:
uvm_study-master, 0 , 2020-04-10
uvm_study-master\.gitignore, 223 , 2019-03-28
uvm_study-master\dut.sv, 415 , 2019-03-28
uvm_study-master\README.md, 5979 , 2019-03-28
uvm_study-master\step01 basic, 0 , 2020-04-10
uvm_study-master\step01 basic\demo.tcl, 496 , 2019-03-28
uvm_study-master\step01 basic\my_driver.sv, 682 , 2019-03-28
uvm_study-master\step01 basic\top_tb.sv, 769 , 2019-03-28
uvm_study-master\step02, 0 , 2020-04-10
uvm_study-master\step02\demo.tcl, 496 , 2019-03-28
uvm_study-master\step02\my_driver.sv, 855 , 2019-03-28
uvm_study-master\step02\top_tb.sv, 713 , 2019-03-28
uvm_study-master\step03, 0 , 2020-04-10
uvm_study-master\step03\demo.tcl, 496 , 2019-03-28
uvm_study-master\step03\my_driver.sv, 920 , 2019-03-28
uvm_study-master\step03\top_tb.sv, 713 , 2019-03-28
uvm_study-master\step04, 0 , 2020-04-10
uvm_study-master\step04\demo.tcl, 496 , 2019-03-28
uvm_study-master\step04\my_driver.sv, 1250 , 2019-03-28
uvm_study-master\step04\my_if.sv, 191 , 2019-03-28
uvm_study-master\step04\top_tb.sv, 1044 , 2019-03-28
uvm_study-master\step05, 0 , 2020-04-10
uvm_study-master\step05\demo.tcl, 496 , 2019-03-28
uvm_study-master\step05\my_driver.sv, 2272 , 2019-03-28
uvm_study-master\step05\my_if.sv, 191 , 2019-03-28
uvm_study-master\step05\my_transaction.sv, 632 , 2019-03-28
uvm_study-master\step05\top_tb.sv, 1065 , 2019-03-28
uvm_study-master\step06, 0 , 2020-04-10
uvm_study-master\step06\demo.tcl, 496 , 2019-03-28
uvm_study-master\step06\my_driver.sv, 2272 , 2019-03-28
uvm_study-master\step06\my_env.sv, 415 , 2019-03-28
uvm_study-master\step06\my_if.sv, 191 , 2019-03-28
uvm_study-master\step06\my_transaction.sv, 632 , 2019-03-28
uvm_study-master\step06\top_tb.sv, 1089 , 2019-03-28
uvm_study-master\step07, 0 , 2020-04-10
uvm_study-master\step07\demo.tcl, 496 , 2019-03-28
uvm_study-master\step07\my_driver.sv, 2272 , 2019-03-28
uvm_study-master\step07\my_env.sv, 579 , 2019-03-28
uvm_study-master\step07\my_if.sv, 191 , 2019-03-28
uvm_study-master\step07\my_monitor.sv, 1892 , 2019-03-28
uvm_study-master\step07\my_transaction.sv, 964 , 2019-03-28
uvm_study-master\step07\top_tb.sv, 1284 , 2019-03-28
uvm_study-master\step08, 0 , 2020-04-10
uvm_study-master\step08\demo.tcl, 496 , 2019-03-28
uvm_study-master\step08\my_agent.sv, 756 , 2019-03-28
uvm_study-master\step08\my_driver.sv, 2272 , 2019-03-28
uvm_study-master\step08\my_env.sv, 575 , 2019-03-28
uvm_study-master\step08\my_if.sv, 191 , 2019-03-28
uvm_study-master\step08\my_monitor.sv, 1892 , 2019-03-28
uvm_study-master\step08\my_transaction.sv, 964 , 2019-03-28
uvm_study-master\step08\top_tb.sv, 1321 , 2019-03-28
uvm_study-master\step09, 0 , 2020-04-10
uvm_study-master\step09\demo.tcl, 496 , 2019-03-28
uvm_study-master\step09\my_agent.sv, 819 , 2019-03-28
uvm_study-master\step09\my_driver.sv, 2270 , 2019-03-28
uvm_study-master\step09\my_env.sv, 1094 , 2019-03-28
uvm_study-master\step09\my_if.sv, 191 , 2019-03-28
uvm_study-master\step09\my_model.sv, 1039 , 2019-03-28
uvm_study-master\step09\my_monitor.sv, 2028 , 2019-03-28
uvm_study-master\step09\my_transaction.sv, 1368 , 2019-03-28
uvm_study-master\step09\top_tb.sv, 1344 , 2019-03-28
uvm_study-master\step10, 0 , 2020-04-10
uvm_study-master\step10\demo.tcl, 496 , 2019-03-28
uvm_study-master\step10\my_agent.sv, 819 , 2019-03-28
uvm_study-master\step10\my_driver.sv, 2270 , 2019-03-28
uvm_study-master\step10\my_env.sv, 1551 , 2019-03-28
uvm_study-master\step10\my_if.sv, 191 , 2019-03-28
uvm_study-master\step10\my_model.sv, 1033 , 2019-03-28
uvm_study-master\step10\my_monitor.sv, 1981 , 2019-03-28
uvm_study-master\step10\my_scoreboard.sv, 2053 , 2019-03-28
uvm_study-master\step10\my_transaction.sv, 2022 , 2019-03-28
uvm_study-master\step10\top_tb.sv, 1372 , 2019-03-28
uvm_study-master\step11, 0 , 2020-04-10
uvm_study-master\step11\demo.tcl, 496 , 2019-03-28
uvm_study-master\step11\my_agent.sv, 819 , 2019-03-28
uvm_study-master\step11\my_driver.sv, 1549 , 2019-03-28
uvm_study-master\step11\my_env.sv, 1551 , 2019-03-28
uvm_study-master\step11\my_if.sv, 191 , 2019-03-28
uvm_study-master\step11\my_model.sv, 1027 , 2019-03-28
uvm_study-master\step11\my_monitor.sv, 1683 , 2019-03-28
uvm_study-master\step11\my_scoreboard.sv, 2042 , 2019-03-28
uvm_study-master\step11\my_transaction.sv, 886 , 2019-03-28
uvm_study-master\step11\top_tb.sv, 1372 , 2019-03-28
uvm_study-master\step12, 0 , 2020-04-10
uvm_study-master\step12\demo.tcl, 496 , 2019-03-28
uvm_study-master\step12\my_agent.sv, 899 , 2019-03-28
uvm_study-master\step12\my_driver.sv, 1569 , 2019-03-28
uvm_study-master\step12\my_env.sv, 1551 , 2019-03-28
uvm_study-master\step12\my_if.sv, 191 , 2019-03-28
uvm_study-master\step12\my_model.sv, 1027 , 2019-03-28
uvm_study-master\step12\my_monitor.sv, 1683 , 2019-03-28
uvm_study-master\step12\my_scoreboard.sv, 2042 , 2019-03-28
uvm_study-master\step12\my_sequencer.sv, 250 , 2019-03-28
uvm_study-master\step12\my_transaction.sv, 886 , 2019-03-28
uvm_study-master\step12\top_tb.sv, 1399 , 2019-03-28
uvm_study-master\step13, 0 , 2020-04-10
uvm_study-master\step13\demo.tcl, 496 , 2019-03-28
uvm_study-master\step13\my_agent.sv, 1005 , 2019-03-28
uvm_study-master\step13\my_driver.sv, 1444 , 2019-03-28
uvm_study-master\step13\my_env.sv, 1814 , 2019-03-28

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