MIPS大作业

Directory: VHDL-FPGA-Verilog
Plat: Verilog
Size: 4KB
Downloads: 3
Upload time: 2019-11-16 13:22:50
Uploader: 无双愣坑
Description:   Single cycle CPU, which can realize basic functions and run on FPGA

File list:
MIPS大作业\ALU.v, 841 , 2015-05-04
MIPS大作业\ALUControl.v, 1273 , 2019-06-04
MIPS大作业\Control.v, 3783 , 2019-06-04
MIPS大作业\CPU.v, 2644 , 2019-06-04
MIPS大作业\D, 0 , 2019-06-04
MIPS大作业\DataMemory.v, 601 , 2015-05-03
MIPS大作业\InstructionMemory.v, 1334 , 2015-05-20
MIPS大作业\mips, 0 , 2019-06-06
MIPS大作业\RegisterFile.v, 743 , 2015-05-03
MIPS大作业\test_cpu.v, 172 , 2015-05-08
MIPS大作业, 0 , 2019-06-06

Download users:

Relate files:

Comment: Add Comment

Favorite users: