rtl

Directory: VHDL-FPGA-Verilog
Plat: Verilog
Size: 77KB
Downloads: 0
Upload time: 2019-03-25 21:31:41
Uploader: 麒零丿空
Description:   Using OV7670 camera module to enlarge 640*480 resolution image to 1024*768 resolution image

File list:
rtl, 0 , 2019-01-13
rtl\coms, 0 , 2019-03-25
rtl\coms\CMOS_Capture.v, 6460 , 2019-01-14
rtl\coms\CMOS_TOP.v, 2960 , 2019-01-14
rtl\coms\i2c_new, 0 , 2019-03-25
rtl\coms\i2c_new\I2C_AV_Config.v, 11435 , 2017-06-13
rtl\coms\i2c_new\I2C_OV7670_RGB565_Config.v, 10516 , 2017-12-14
rtl\sdram_fifo, 0 , 2019-01-14
rtl\sdram_fifo\MYFIFO512x16, 0 , 2019-01-13
rtl\sdram_fifo\MYFIFO512x16\MyFIFO512x16.v, 1256 , 2017-01-09
rtl\sdram_fifo\MYFIFO512x16\MyFIFO512x16.v.bak, 1256 , 2017-01-09
rtl\sdram_fifo\MYFIFO512x16\MyFIFO_Ctrl.v, 4323 , 2018-11-13
rtl\sdram_fifo\MYFIFO512x16\MyFIFO_Ctrl.v.bak, 4323 , 2018-11-02
rtl\sdram_fifo\MYFIFO512x16\NGM_Lib.v, 587 , 2017-01-04
rtl\sdram_fifo\MYFIFO512x16\NGM_Lib.v.bak, 585 , 2015-06-30
rtl\sdram_fifo\MYFIFO512x16\bram_512X16, 0 , 2019-01-13
rtl\sdram_fifo\MYFIFO512x16\bram_512X16\bram_512X16.qip, 199 , 2017-01-10
rtl\sdram_fifo\MYFIFO512x16\bram_512X16\bram_512X16.v, 9560 , 2017-01-13
rtl\sdram_fifo\cmos_fifo.v, 4362 , 2019-01-14
rtl\sdram_fifo\sdram_fifo_cntl.v, 4414 , 2019-01-14
rtl\sdram_fifo\vga_fifo, 0 , 2019-01-13
rtl\sdram_fifo\vga_fifo\sdram_vga_ram, 0 , 2019-01-13
rtl\sdram_fifo\vga_fifo\sdram_vga_ram\ram_vga_1024X16, 0 , 2019-01-13
rtl\sdram_fifo\vga_fifo\sdram_vga_ram\ram_vga_1024X16\ram_vga_1024x16.qip, 203 , 2018-10-25
rtl\sdram_fifo\vga_fifo\sdram_vga_ram\ram_vga_1024X16\ram_vga_1024x16.v, 9857 , 2018-10-25
rtl\sdram_fifo\vga_fifo\sdram_vga_ram\sdram_vga_ram.v, 10498 , 2019-01-09
rtl\sdram_fifo\vga_fifo\sdram_vga_ram\sdram_vga_ram_sim.v, 12269 , 2019-01-10
rtl\sdram_fifo\vga_fifo\vga_bilintp_cal, 0 , 2019-01-14
rtl\sdram_fifo\vga_fifo\vga_bilintp_cal\dsp_mult_16x16, 0 , 2019-01-13
rtl\sdram_fifo\vga_fifo\vga_bilintp_cal\dsp_mult_16x16\dsp_mult_16x16.qip, 199 , 2018-11-12
rtl\sdram_fifo\vga_fifo\vga_bilintp_cal\dsp_mult_16x16\dsp_mult_16x16.v, 4712 , 2018-11-12
rtl\sdram_fifo\vga_fifo\vga_bilintp_cal\dsp_mult_4x4, 0 , 2019-01-13
rtl\sdram_fifo\vga_fifo\vga_bilintp_cal\dsp_mult_4x4\dsp_mult_4x4.qip, 197 , 2018-11-14
rtl\sdram_fifo\vga_fifo\vga_bilintp_cal\dsp_mult_4x4\dsp_mult_4x4.v, 4669 , 2018-11-14
rtl\sdram_fifo\vga_fifo\vga_bilintp_cal\dsp_mult_8x8, 0 , 2019-01-13
rtl\sdram_fifo\vga_fifo\vga_bilintp_cal\dsp_mult_8x8\dsp_mult_8x8.qip, 197 , 2018-11-12
rtl\sdram_fifo\vga_fifo\vga_bilintp_cal\dsp_mult_8x8\dsp_mult_8x8.v, 4680 , 2018-11-12
rtl\sdram_fifo\vga_fifo\vga_bilintp_cal\vga_bilintp_cal_exer.v, 7373 , 2019-01-14
rtl\sdram_fifo\vga_fifo\vga_bilintp_eng, 0 , 2019-01-14
rtl\sdram_fifo\vga_fifo\vga_bilintp_eng\buf_para, 0 , 2019-01-13
rtl\sdram_fifo\vga_fifo\vga_bilintp_eng\buf_para\buf_para_h.v, 6777 , 2019-01-03
rtl\sdram_fifo\vga_fifo\vga_bilintp_eng\buf_para\buf_para_h_test.v, 6782 , 2019-01-09
rtl\sdram_fifo\vga_fifo\vga_bilintp_eng\buf_para\buf_para_h_test.v.bak, 6777 , 2019-01-09
rtl\sdram_fifo\vga_fifo\vga_bilintp_eng\buf_para\buf_para_h_tmp.v, 1000 , 2018-11-07
rtl\sdram_fifo\vga_fifo\vga_bilintp_eng\buf_para\buf_para_v.v, 6777 , 2019-01-03
rtl\sdram_fifo\vga_fifo\vga_bilintp_eng\buf_para\buf_para_v_test.v, 6782 , 2019-01-09
rtl\sdram_fifo\vga_fifo\vga_bilintp_eng\buf_para\buf_para_v_test.v.bak, 6777 , 2019-01-09
rtl\sdram_fifo\vga_fifo\vga_bilintp_eng\buf_para\buf_para_v_tmp.v, 1000 , 2018-11-07
rtl\sdram_fifo\vga_fifo\vga_bilintp_eng\buf_para\para_h.mif, 1210 , 2018-11-06
rtl\sdram_fifo\vga_fifo\vga_bilintp_eng\buf_para\para_v.mif, 1210 , 2018-11-06
rtl\sdram_fifo\vga_fifo\vga_bilintp_eng\vga_bilintp_eng.v, 14102 , 2019-01-14
rtl\sdram_fifo\vga_fifo\vga_fifo, 0 , 2019-01-14
rtl\sdram_fifo\vga_fifo\vga_fifo\vga_fifo.v, 5255 , 2019-01-14
rtl\sdram_fifo\vga_fifo\vga_pingpong_buf, 0 , 2019-01-14
rtl\sdram_fifo\vga_fifo\vga_pingpong_buf\buf_1024x16, 0 , 2019-01-13
rtl\sdram_fifo\vga_fifo\vga_pingpong_buf\buf_1024x16\buf_1024x16.qip, 199 , 2018-10-31
rtl\sdram_fifo\vga_fifo\vga_pingpong_buf\buf_1024x16\buf_1024x16.v, 9847 , 2018-10-31
rtl\sdram_fifo\vga_fifo\vga_pingpong_buf\vga_pingpong_buf.v, 3936 , 2019-01-14
rtl\sdram_ip, 0 , 2019-01-13
rtl\sdram_ip\sdram_cmd.v, 7994 , 2017-02-06
rtl\sdram_ip\sdram_ctrl.v, 11760 , 2018-11-02
rtl\sdram_ip\sdram_top.v, 5222 , 2017-01-11
rtl\sdram_ip\sdram_wr_data.v, 3636 , 2017-01-06
rtl\system_ctrl, 0 , 2019-01-13
rtl\system_ctrl\system_ctrl.v, 2889 , 2015-08-04
rtl\top, 0 , 2019-01-13
rtl\top\sdram_ov7670_vga.v, 7144 , 2019-01-13
rtl\vga_top, 0 , 2019-01-13
rtl\vga_top\vga_driver.v, 3534 , 2018-11-02
rtl\vga_top\vga_driver_sim.v, 3298 , 2018-11-02
rtl\vga_top\vga_para.v, 3975 , 2018-11-01
rtl\vga_top\vga_top.v, 1344 , 2017-01-09

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