multicycle-verilog(1)

Directory: VHDL-FPGA-Verilog
Plat: Verilog
Size: 530KB
Downloads: 4
Upload time: 2018-06-20 16:58:24
Uploader: wxt11131
Description:   A normal multi cycle MIPS processor is implemented, which contains more than 20 simple MIPS instructions.

File list:
multicycle-verilog\Main-verilog\ADR.v, 250 , 2018-05-18
multicycle-verilog\Main-verilog\ALU.v, 516 , 2018-05-18
multicycle-verilog\Main-verilog\ALUoutDR.v, 255 , 2018-05-18
multicycle-verilog\Main-verilog\BDR.v, 250 , 2018-05-18
multicycle-verilog\Main-verilog\ControlUnit.v, 910 , 2018-05-18
multicycle-verilog\Main-verilog\cpu_tb.v, 642 , 2018-05-18
multicycle-verilog\Main-verilog\DataMEM.v, 900 , 2018-05-18
multicycle-verilog\Main-verilog\DataSelector_2to1.v, 270 , 2018-05-18
multicycle-verilog\Main-verilog\DataSelector_2to1_sa.v, 326 , 2018-05-18
multicycle-verilog\Main-verilog\DataSelector_3to1.v, 451 , 2018-05-18
multicycle-verilog\Main-verilog\DataSelector_4to1.v, 513 , 2018-05-18
multicycle-verilog\Main-verilog\DBDR.v, 251 , 2018-05-18
multicycle-verilog\Main-verilog\DFlipFlop.v, 363 , 2018-05-18
multicycle-verilog\Main-verilog\InstructionMEM.v, 3193 , 2018-05-19
multicycle-verilog\Main-verilog\IR.v, 366 , 2018-05-18
multicycle-verilog\Main-verilog\Main.v, 2216 , 2018-05-18
multicycle-verilog\Main-verilog\NextState.v, 1552 , 2018-05-18
multicycle-verilog\Main-verilog\OutputFunc.v, 3176 , 2018-05-18
multicycle-verilog\Main-verilog\PC.v, 583 , 2018-05-18
multicycle-verilog\Main-verilog\PCAddFour.v, 193 , 2018-05-18
multicycle-verilog\Main-verilog\PCAddImm.v, 262 , 2018-05-18
multicycle-verilog\Main-verilog\PCJump.v, 389 , 2018-05-18
multicycle-verilog\Main-verilog\RegFile.v, 738 , 2018-05-18
multicycle-verilog\Main-verilog\SignExtend.v, 688 , 2018-05-18
multicycle-verilog\multicycle.docx, 595011 , 2018-05-19
multicycle-verilog\Main-verilog, 0 , 2018-05-19
multicycle-verilog, 0 , 2018-05-19

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