counter (2)

Directory: Other systems
Plat: VHDL
Size: 1KB
Downloads: 2
Upload time: 2017-07-18 19:24:12
Uploader: tariq
Description:   This tutorial introduce VHDL code for clock pulse and 4-bit counter. With four bits, the counter count from 0 to 15. The timing of the counter is controlled by a clock signal. There will be a clear signal which can reset the counter value.

File list:
clock_pulse.zip
counter.do
counter.zip

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