HA_Dataflow_view
Directory:
Other systems
Plat: VHDL
Size: 1KB
Downloads: 1
Upload time: 2017-07-18 19:19:04
Uploader:
tariq
Description: A half-adder adds two 1-bit inputs and produces a sum bit and a carry bit as outputs.
File list:
HA_Dataflow_view.vhd
HA_Structure_view.vhd
half-adder.do
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