2_Embedded_System_Design_flow_on_Zynq
zynq 

Directory: LabView
Plat: C++
Size: 21198KB
Downloads: 5
Upload time: 2017-04-03 13:15:22
Uploader: lurom
Description:   Digital Image Processing

File list:
2_Embedded_System_Design_flow_on_Zynq
.....................................\2015_2_zynq_docs_source
.....................................\.......................\01_Class_Intro.pptx,256659,2015-07-31
.....................................\.......................\11a_Lab1_Intro.pptx,257337,2015-07-31
.....................................\.......................\11_Vivado_Overview.pptx,8352117,2015-09-03
.....................................\.......................\12_Zynq_Architecture.pptx,1280568,2015-09-03
.....................................\.......................\13a_Lab2_Intro.pptx,254439,2015-07-31
.....................................\.......................\13_Extending_Embedded_System_into_PL.pptx,1610271,2015-09-03
.....................................\.......................\14a_Lab3_Intro.pptx,253723,2015-07-31
.....................................\.......................\14_Creating_and_Adding_Custom_IP.pptx,1918028,2015-07-31
.....................................\.......................\21a_Lab4_Intro.pptx,254982,2015-07-31
.....................................\.......................\21_Software_Development_Environment.pptx,2762052,2015-08-07
.....................................\.......................\22a_Lab5_Intro.pptx,255229,2015-07-31
.....................................\.......................\22_Software_Development_and_Debug.pptx,1024323,2015-08-07
.....................................\2015_2_zynq_labdocs_pdf
.....................................\.......................\lab1_Use Vivado to build an Embedded System.pdf,1500122,2015-07-30
.....................................\.......................\lab2_Adding IP cores in PL.pdf,1967134,2015-07-30
.....................................\.......................\lab3_Adding Custom IP to the System.pdf,1752609,2015-07-30
.....................................\.......................\lab4_Writing Basic Software Application.pdf,318806,2015-07-30
.....................................\.......................\lab5_Software Writing for Timer and Debugging.pdf,343980,2015-07-30
.....................................\2015_2_zynq_sources
.....................................\...................\lab2
.....................................\...................\....\lab2.c,696,2015-07-24
.....................................\...................\lab3
.....................................\...................\....\lab3_user_logic.v,666,2015-07-24
.....................................\...................\....\lab3_zed.xdc,906,2015-07-24
.....................................\...................\....\lab3_zybo.xdc,498,2015-07-24
.....................................\...................\....\user_logic_instantiation.txt,304,2015-07-24
.....................................\...................\lab4
.....................................\...................\....\lab4.c,797,2015-07-24
.....................................\...................\....\lab4_soln.c,888,2015-07-24
.....................................\...................\lab5
.....................................\...................\....\lab5.c,1711,2015-07-24
.....................................\...................\....\lab5_completed.c,2347,2015-07-24
.....................................\readme_zedboard.docx,25638,2016-05-19

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