FX2LP-FPGA

Directory: VHDL-FPGA-Verilog
Plat: VHDL
Size: 587KB
Downloads: 17
Upload time: 2014-09-16 23:57:34
Uploader: 书才
Description:   xilinx FPGA XC6LX9 and communication program CY7C68013

File list:
FX2LP-FPGA
..........\abc.ucf,1267,2013-10-03
..........\device_usage_statistics.html,79136,2010-04-22
..........\fpga_master.bgn,6477,2013-10-03
..........\fpga_master.bit,340700,2013-10-03
..........\fpga_master.bld,1026,2013-10-03
..........\fpga_master.cmd_log,4206,2013-10-03
..........\fpga_master.drc,193,2013-10-03
..........\fpga_master.lpc,920,2010-02-17
..........\fpga_master.lso,6,2013-10-03
..........\fpga_master.mfp,0,2010-02-17
..........\fpga_master.ncd,11146,2013-10-03
..........\fpga_master.ngc,8354,2013-10-03
..........\fpga_master.ngd,14391,2013-10-03
..........\fpga_master.ngr,6729,2013-10-03
..........\fpga_master.pad,7133,2013-10-03
..........\fpga_master.par,8661,2013-10-03
..........\fpga_master.pcf,1371,2013-10-03
..........\fpga_master.prj,28,2013-10-03
..........\fpga_master.ptwx,17226,2013-10-03
..........\fpga_master.stx,0,2013-10-03
..........\fpga_master.syr,16705,2013-10-03
..........\fpga_master.twr,2637,2013-10-03
..........\fpga_master.twx,19414,2013-10-03
..........\fpga_master.ucf,0,1980-01-01
..........\fpga_master.unroutes,154,2013-10-03
..........\fpga_master.ut,556,2013-10-03
..........\fpga_master.xpi,46,2013-10-03
..........\fpga_master.xst,1095,2013-10-03
..........\fpga_masternew.ucf,0,2010-02-24
..........\fpga_master_bitgen.xwbt,260,2013-10-03
..........\fpga_master_envsettings.html,10862,2013-10-04
..........\fpga_master_guide.ncd,11146,2013-10-03
..........\fpga_master_map.map,6575,2013-10-03
..........\fpga_master_map.mrp,12680,2013-10-03
..........\fpga_master_map.ncd,7762,2013-10-03
..........\fpga_master_map.ngm,26870,2013-10-03
..........\fpga_master_map.xrpt,27417,2013-10-03
..........\fpga_master_new.ucf,0,2010-02-24
..........\fpga_master_ngdbuild.xrpt,5355,2013-10-03
..........\fpga_master_pad.csv,7165,2013-10-03
..........\fpga_master_pad.txt,29496,2013-10-03
..........\fpga_master_par.xrpt,80620,2013-10-03
..........\fpga_master_prev_built.ngd,15547,2010-04-30
..........\fpga_master_summary.html,16645,2013-10-04
..........\fpga_master_summary.xml,409,2013-10-03
..........\fpga_master_usage.xml,20589,2013-10-03
..........\fpga_master_vhdl.prj,131,2012-06-02
..........\fpga_master_xst.xrpt,11556,2013-10-03
..........\FX2LP-FPGA.gise,13239,2013-10-04
..........\FX2LP-FPGA.restore,61675,2010-04-30
..........\FX2LP-FPGA.tcl,22022,2012-06-02
..........\fx2lp-fpga.vhd,3650,2012-02-04
..........\FX2LP-FPGA.xise,48209,2013-10-03
..........\FX2LP-FPGA_ise10migration.zip,389107,2010-03-18
..........\FX2LP-FPGA_xdb
..........\..............\cst.xbcd,2427,2010-04-30
..........\..............\tmp
..........\..............\...\ise
..........\..............\...\...\version,138,2012-02-04
..........\..............\...\...\__OBJSTORE__
..........\..............\...\...\............\HierarchicalDesign
..........\..............\...\...\............\..................\HDProject
..........\..............\...\...\............\..................\.........\HDProject,201,2012-02-04
..........\..............\...\...\............\..................\.........\HDProject_StrTbl,28,2012-02-04
..........\..............\...\...\............\..................\__stored_object_table__,60,2012-02-04
..........\..............\...\...\............\PnAutoRun
..........\..............\...\...\............\.........\Scripts
..........\..............\...\...\............\.........\.......\RunOnce_tcl,27,2012-02-04
..........\..............\...\...\............\.........\.......\RunOnce_tcl_StrTbl,3817,2012-02-04
..........\..............\...\...\............\ProjectNavigator
..........\..............\...\...\............\................\dpm_project_main
..........\..............\...\...\............\................\................\dpm_project_main,76,2012-02-04
..........\..............\...\...\............\................\................\dpm_project_main_StrTbl,32,2012-02-04
..........\..............\...\...\............\................\................\NameMap,29,2012-02-04
..........\..............\...\...\............\................\................\NameMap_StrTbl,10,2012-02-04
..........\..............\...\...\............\................\__stored_objects__,79234,2012-02-04
..........\..............\...\...\............\................\__stored_objects___StrTbl,35187,2012-02-04
..........\..............\...\...\............\................\__stored_object_table__,63072,2012-02-04
..........\..............\...\...\............\ProjectNavigatorGui
..........\..............\...\...\............\...................\GuiProjectData,242,2012-02-04
..........\..............\...\...\............\...................\GuiProjectData_StrTbl,729,2012-02-04
..........\..............\...\...\__REGISTRY__
..........\..............\...\...\............\Autonym
..........\..............\...\...\............\.......\regkeys,0,2012-02-04
..........\..............\...\...\............\bitgen
..........\..............\...\...\............\......\regkeys,46,2012-02-04
..........\..............\...\...\............\common
..........\..............\...\...\............\......\regkeys,173,2012-02-04
..........\..............\...\...\............\cpldfit
..........\..............\...\...\............\.......\regkeys,47,2012-02-04
..........\..............\...\...\............\dumpngdio
..........\..............\...\...\............\.........\regkeys,49,2012-02-04
..........\..............\...\...\............\fuse
..........\..............\...\...\............\....\regkeys,44,2012-02-04
..........\..............\...\...\............\HierarchicalDesign
..........\..............\...\...\............\..................\HDProject
..........\..............\...\...\............\..................\.........\regkeys,485,2012-02-04
..........\..............\...\...\............\..................\regkeys,0,2012-02-04
..........\..............\...\...\............\hprep6

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