my_test_rw_pack9

Directory: VHDL-FPGA-Verilog
Plat: VHDL
Size: 3438KB
Downloads: 38
Upload time: 2013-01-31 11:13:26
Uploader: 唐小巫
Description:   SDRAM controller based on Verilog HDL. Experimental conditions: Tools: Quartus II 6.0, SignalTap II FPGA: Altera Cyclone EP1C12Q240C8N SDRAM: HY57V283220T-6

File list:
my_test_rw_pack9
................\00 read me.txt,870,2012-09-30
................\datagene.bsf,2797,2012-10-30
................\datagene.v,4929,2012-10-30
................\db
................\..\altsyncram_0ki2.tdf,62017,2012-09-28
................\..\altsyncram_1ki2.tdf,100608,2012-09-28
................\..\altsyncram_3ki2.tdf,92264,2012-09-29
................\..\altsyncram_5ki2.tdf,102694,2012-09-28
................\..\altsyncram_7ki2.tdf,94350,2012-09-29
................\..\altsyncram_dki2.tdf,106866,2012-09-28
................\..\altsyncram_dpi2.tdf,125623,2012-09-30
................\..\altsyncram_fki2.tdf,107909,2012-09-28
................\..\altsyncram_hmi2.tdf,99065,2012-09-29
................\..\altsyncram_lpi2.tdf,129851,2012-09-30
................\..\altsyncram_nji2.tdf,67232,2012-09-28
................\..\altsyncram_rmi2.tdf,94869,2012-09-29
................\..\altsyncram_vji2.tdf,52630,2012-09-28
................\..\cmpr_5mh.tdf,1548,2012-09-28
................\..\cmpr_fnh.tdf,1549,2012-09-29
................\..\cntr_3je.tdf,4779,2012-09-30
................\..\cntr_3jf.tdf,4054,2012-09-28
................\..\cntr_4ag.tdf,4029,2012-09-28
................\..\cntr_5af.tdf,4565,2012-09-29
................\..\cntr_dhe.tdf,4547,2012-09-28
................\..\cntr_dkf.tdf,4746,2012-09-29
................\..\cntr_ebg.tdf,4724,2012-09-29
................\..\cntr_f7f.tdf,3872,2012-09-28
................\..\cntr_fgh.tdf,4967,2012-09-29
................\..\cntr_hhe.tdf,4547,2012-09-28
................\..\cntr_ihe.tdf,4547,2012-09-28
................\..\cntr_jhe.tdf,4778,2012-09-28
................\..\cntr_khe.tdf,4778,2012-09-29
................\..\cntr_lhe.tdf,4778,2012-09-28
................\..\cntr_mhe.tdf,4778,2012-09-29
................\..\cntr_nhe.tdf,4778,2012-09-29
................\..\cntr_pdh.tdf,4274,2012-09-28
................\..\cntr_phe.tdf,4778,2012-09-28
................\..\cntr_qhe.tdf,4778,2012-09-28
................\..\cntr_vie.tdf,4779,2012-09-30
................\..\decode_ogi.tdf,3463,2012-09-28
................\..\test_rw_pack.asm.qmsg,1656,2012-10-30
................\..\test_rw_pack.cbx.xml,1849,2012-10-30
................\..\test_rw_pack.cmp.cdb,385261,2012-10-30
................\..\test_rw_pack.cmp.hdb,61133,2012-10-30
................\..\test_rw_pack.cmp.kpt,212,2012-10-30
................\..\test_rw_pack.cmp.logdb,4,2012-10-30
................\..\test_rw_pack.cmp.rdb,59284,2012-10-30
................\..\test_rw_pack.cmp.tdb,336856,2012-10-30
................\..\test_rw_pack.cmp0.ddb,300891,2012-10-30
................\..\test_rw_pack.dbp,0,2012-10-30
................\..\test_rw_pack.db_info,151,2012-09-25
................\..\test_rw_pack.eco.cdb,156,2012-10-30
................\..\test_rw_pack.eds_overflow,7,2012-10-30
................\..\test_rw_pack.fit.qmsg,96364,2012-10-30
................\..\test_rw_pack.hier_info,39137,2012-10-30
................\..\test_rw_pack.hif,518679,2012-10-30
................\..\test_rw_pack.map.cdb,99379,2012-10-30
................\..\test_rw_pack.map.hdb,63657,2012-10-30
................\..\test_rw_pack.map.logdb,4,2012-10-30
................\..\test_rw_pack.map.qmsg,512617,2012-10-30
................\..\test_rw_pack.pre_map.cdb,46075,2012-10-30
................\..\test_rw_pack.pre_map.hdb,28106,2012-10-30
................\..\test_rw_pack.psp,0,2012-10-30
................\..\test_rw_pack.pss,0,2012-10-30
................\..\test_rw_pack.rtlv.hdb,27324,2012-10-30
................\..\test_rw_pack.rtlv_sg.cdb,44723,2012-10-30
................\..\test_rw_pack.rtlv_sg_swap.cdb,5669,2012-10-30
................\..\test_rw_pack.sgdiff.cdb,89486,2012-10-30
................\..\test_rw_pack.sgdiff.hdb,110031,2012-10-30
................\..\test_rw_pack.signalprobe.cdb,378,2012-10-30
................\..\test_rw_pack.sim.hdb,2482,2012-10-30
................\..\test_rw_pack.sim.qmsg,23027,2012-10-30
................\..\test_rw_pack.sim.rdb,48010,2012-10-30
................\..\test_rw_pack.sim.vwf,343868,2012-10-30
................\..\test_rw_pack.sld_design_entry.sci,1019,2012-10-30
................\..\test_rw_pack.sld_design_entry_dsc.sci,2690,2012-10-30
................\..\test_rw_pack.smp_dump.txt,2902,2012-10-30
................\..\test_rw_pack.syn_hier_info,0,2012-10-30
................\..\test_rw_pack.tan.qmsg,124003,2012-10-30
................\..\wed.zsf,470,2012-10-30
................\PLLU.bsf,3884,2012-10-30
................\PLLU.cmp,988,2012-10-30
................\PLLU.ppf,464,2012-10-30
................\PLLU.v,15639,2012-10-30
................\PLLU_bb.v,11903,2012-10-30
\
................\PLLU_waveforms.html,1021,2012-10-30
................\sdram_cmd.v,4663,2012-09-29
................\sdram_ctrl.v,11489,2012-10-30
................\sdram_wr_data.v,2654,2012-10-30
................\sdr_para.v,3010,2012-09-29
................\stp1.stp,164934,2012-10-30
................\test_rw_pack.asm.rpt,7888,2012-10-30
................\test_rw_pack.bdf,21976,2012-10-30
................\test_rw_pack.cdf,305,2012-09-29
................\test_rw_pack.done,26,2012-10-30
................\test_rw_pack.fit.rpt,266378,2012-10-30
................\test_rw_pack.fit.smsg,411,2012-10-30
................\test_rw_pack.fit.summary,436,2012-10-30

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