SPI

Directory: VHDL-FPGA-Verilog
Plat: VHDL
Size: 48KB
Downloads: 51
Upload time: 2011-06-11 10:59:43
Uploader: hechunzhi99
Description:   SPI Interface fifo buffer containing the source code, using verilog language

File list:
SPI
...\fifo4.v,4378,2007-04-05
...\rsacypher.vhd,5056,2007-04-05
...\simple_spi.pdf,55328,2007-04-05
...\simple_spi_top.v,10507,2007-04-05

Download users:

Relate files:

Comment: Add Comment

Favorite users: